1. Field of the Invention
The present invention relates to a charge transfer memory constructed with series-parallel-series organization and having a bias charge operation, in which a read-in chain is provided and comprises first and second charge transfer elements alternately arranged behind one another, and in which the read-in chain has a field of parallel chains having charge transfer elements assigned thereto, into which the charges characterizing the information are transferred from the read-in chain by way of transfer electrodes and in which a read-out chain is provided, comprising first and second charge transfer elements alternately arranged behind one another, into which the charges are delivered from the parallel chains by way of delivery electrodes.
2. Description of the Prior Art
A bias charge operation in charge transfer memories is known in the art. Therefore, a bias charge operation in surface charge transfer memories for reducing the harmful influences which the surface conditions exert on the conduction of the signal is described in the book by Sequin & Tompsett, "Charge Transfer Devices", Academic Press, New York, San Francisco, London, 1975, pp. 97-109.
In charge transfer memories, one attempts to prevent the emptying of the surface conditions for movable charge carriers with the assistance of bias charge operation. In particular, upon shifting so-called empty potential wells which are in a state of thermodynamic inequilibrium, the surface conditions change and emit charges to the potential wells so that the potential wells gradually fill in an undesired manner. This leads to the fact that, given a possible subsequent passage of filled charge wells, these are accordingly emptied, because the original surface conditions again fill when charges are offered and, therefore, remove charges from the potential wells.
A bias charge operation, for example, is necessary in charge transfer modules with surface charge transfer devices (CCDs) in double silicon technology, in order to assure that, for example, in two-phase operation, only the intermediate storage locations are respectively empty, not, however, also the storage locations which carry the information "0", i.e. those which are not filled with an information charge.
In such memory modules, an input circuit is provided which feeds the bias charges into the actual memory chain, together with the information charges. In this manner, however, only the bias charge operation is taken of which is along the actual information flow path, which means that all channels of a parallel field within a series-parallel-series arrangement are always filled with at least the bias charge.
If, in series-parallel-series charge transfer memories, the serially read-in information charges of the input serial chain are transferred into the parallel field, then the input serial chain is first completely without charges upon this transfer. Only subsequently is it again gradually filled proceeding from the input circuit. This leads to the fact that the read-in information charge packets are harmfully reduced by means of the partially emptied surface conditions.
An analogous case is true for the output serial chain of charge transfer memories in series-parallel-series organization. After the delivery of the information charges from the parallel field into the output serial chain, the latter is increasingly emptied upon the flow of the information charges into the output circuit. Directly before the next delivery process, all charge transfer elements of the output serial chain are completely evacuated. Stemming from the surface conditions, the empty charge transfer elements increasingly fill in the direction of the output circuit with harmful interference charges. Therefore, surface conditions become free in the opposite direction, whereby both processes have a disruptive effect on the information charges to be newly delivered from the parallel field.
The charges locally near the output circuit are intolerably increased by means of the interference charges collected. The charges distant from the output circuit are untolerably reduced by means of the refilling of the empty surface conditions. There therefore occurs an unallowably large charge difference, particularly between the first information charge and the last information charge of two successive delivery processes.